1. Field of the Invention
The present invention relates generally to data driven information processors executing parallel processing and more particularly to a data driven information processor for processing a data packet including a plurality of pieces of data.
2. Description of the Related Art
In recent years, in various fields including high resolution image processing and various simulations, there is an increased demand for the improvement of processor performances. Increase in the operation speed of devices achieved by today's LSI (Large Scale Integration) manufacturing techniques however has its limit. Parallel processing calls much attention instead, and processings based on the data driven method are much studied and developed.
FIG. 1A is a block diagram showing the configuration of a conventional data driven information processing device (hereinafter referred to as data driven processor).
FIG. 1B is a diagram showing the structure of a data packet processed by the conventional data driven processor.
A data packet 110 includes instruction information 106, destination information (node number) 107, a generation number 108, and one piece of data 109. Instruction information 106 indicates the kind of an instruction to be processed by the data driven processor, in other words indicates information for identifying an operation to be executed on data 109. Destination information (node number) 107 indicates a node number in a program, and determines which data driven processor the data packet is input to. Generation number 108 is information for identifying a plurality of data pairs, and different numbers are given to different data pairs. The data pair corresponds to the operand of an instruction, and data 109 in data packet 110 corresponds to one of the data pair. If, therefore, the instruction has two operands, there are two data packets including the same destination information 107 and the same generation number 108. The generation number 108 is not necessary for the static data driven method which tolerates only one data pair in a processing, but the generation number will be necessary for a dynamic data driven method which tolerates two or more data pairs.
A junction portion 101 refers to destination information 107 in data packet 110 and determines whether or not data packet 110 should be processed in the data driven processor. Junction portion 101 receives data packet 110 as an input and outputs the packet to a firing control portion 102 if it determines that data packet 110 should be processed in the data driven processor.
Firing control portion 102 determines whether or not data to be operated with data 109 in the input data packet 110 (data 109 in another data packet 110 including the same destination information 107 and the same generation number 108) is already present in a queuing memory which is not shown. If such data to be operated with data 109 in the input data packet 110 is present in the queuing memory, firing control portion 102 outputs these pieces of data (data pair) to a function processor portion 103. If no such data to be operated with data 109 in the input data packet 110 is present in the queuing memory, firing control portion 102 stores data 109 in the queuing memory for queuing.
Function processor portion 103 refers to instruction information 106, executes an operation such as multiplication and addition on the input data pair, and outputs the operation result to a program storage portion 104.
Program storage portion 104 receives the operation result, produces a data packet 110 having its information replaced with destination information (node number) 107 and instruction information 106 necessary for fetching a next instruction and outputs the packet to a branching portion 105.
Branching portion 105 refers to destination information 107 in data packet 110 output from program storage portion 104, and outputs data packet 110 to junction portion 101 based on the determination that the packet should be processed within the data driven processor, and outputs data packet 110 to another data driven processor if the packet should not be processed within the data driven processor.
The conventional data driven processor described above is presented by Kanekura et al., in Microcomputer Architecture Symposium, November, 1991, as "An Evaluation of Parallel-Processing in the Dynamic Data-Driven Processors" pp.9-17.
Data packet 110 processed in the conventional data driven processor includes only one piece of data, and cannot include a plurality of pieces of data. A data driven processor described in Japanese Patent Laying-Open No. 5-233854 including a plurality of data pair detection portions, a plurality of program storage portions, and a plurality of operation processing portions executes processing of a data packet including a plurality of pieces of instruction information, a plurality of pieces of destination information, a plurality of generation numbers and a plurality of pieces of data. The data packet including a plurality of pieces of data is therefore formed simply by combining a plurality of data packets into a single data packet.